السلام عليكم اخواني
ارجو مساعدتكم في الحضول على الابحاث التالية
[31] S. Goswami, J. Silver, T. Copani, " A 14mW 5Gb/s CMOS TIA with gain-reuse regulated cascode compensation for parallel optical interconnects " , IEEE Solid-State Circuits Conf. , pp. 100-101, San Francisco, Feb, 2009.
[34] C.Y Wang, C.S Wang and C.K Wang, " An 18-mW Two-Stage CMOS Transimpedance Amplifier for 10Gb/s Optical Application ", IEEE Asian Solid-State Circuit Conference, pp. 412-415, Nov. 2007.
[35] M. Maadani and M. Atarodi, " A Low-Area, 0.18μm CMOS, 10Gb/s Optical Receiver Analog Frond End ", IEEE International Symposiums on Circuits and Systems,, pp. 3904-3907, May. 2007
[34] C.Y Wang, C.S Wang and C.K Wang, " An 18-mW Two-Stage CMOS Transimpedance Amplifier for 10Gb/s Optical Application ", IEEE Asian Solid-State Circuit Conference, pp. 412-415, Nov. 2007.
[35] M. Maadani and M. Atarodi, " A Low-Area, 0.18μm CMOS, 10Gb/s Optical Receiver Analog Frond End ", IEEE International Symposiums on Circuits and Systems,, pp. 3904-3907, May. 2007